Description: 《Delphi源代码分析》
本书通过对Delphi内核（RTL）源代码进行分析，深入阐述了Delphi内核（RTL）的原理及其实现。全书从Nico Bendlin编写的著名最小化内核示例程序MiniDExe讲起，基于MiniDExe分析Delphi在编译器一级的技术内幕，带领读者一窥Delphi的核心。随后作者基于这个内核逐层地包装代码，将Delphi的各种功能的具体实现一一展现，通过列出关键性代码并进行系统性分析的方式，全面分析对象结构、VCL和COM等在源代码中的实现。全书内容详实，阐述精辟、深入，主要议题包括：Delphi的编译器在Windows、Delphi RTL和用户代码之间的交互；Delphi RTL内核代码的完整实现；与Delphi内核相关的操作系统机制；初始（入口）代码、模块、内存、线程、资源、异常处理机制等。 本书是一本不可多得的高端技术图书，适合中、高级Delphi开发人员研读。
-"Delphi source code analysis," the book of Delphi kernel (RTL) source code the analysis, further expounded on Delphi kernel (RTL) and the realization of the principle. Nico Bendlin from the book prepared by the famous minimum core sample program MiniDExe 1960s, Based on the analysis MiniDExe Delphi compiler in a technical insider, Delphi takes the reader a glimpse into the core. Then based on the author to the core layer packaging code, Delphi will be the realization of a concrete display, listing key code and systematic analysis, a comprehensive analysis of object structure, VCL and COM as the source code to the implementation. Informative book, brilliantly expounded, in-depth, major issues include : Delphi compiler for Windows, Delphi RTL code and the user interaction; Delphi R Platform: |
Size: 11641885 |
Author:邢某 |
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Description: 《Delphi源代码分析》
本书通过对Delphi内核（RTL）源代码进行分析，深入阐述了Delphi内核（RTL）的原理及其实现。全书从Nico Bendlin编写的著名最小化内核示例程序MiniDExe讲起，基于MiniDExe分析Delphi在编译器一级的技术内幕，带领读者一窥Delphi的核心。随后作者基于这个内核逐层地包装代码，将Delphi的各种功能的具体实现一一展现，通过列出关键性代码并进行系统性分析的方式，全面分析对象结构、VCL和COM等在源代码中的实现。全书内容详实，阐述精辟、深入，主要议题包括：Delphi的编译器在Windows、Delphi RTL和用户代码之间的交互；Delphi RTL内核代码的完整实现；与Delphi内核相关的操作系统机制；初始（入口）代码、模块、内存、线程、资源、异常处理机制等。 本书是一本不可多得的高端技术图书，适合中、高级Delphi开发人员研读。
-"Delphi source code analysis," the book of Delphi kernel (RTL) source code the analysis, further expounded on Delphi kernel (RTL) and the realization of the principle. Nico Bendlin from the book prepared by the famous minimum core sample program MiniDExe 1960s, Based on the analysis MiniDExe Delphi compiler in a technical insider, Delphi takes the reader a glimpse into the core. Then based on the author to the core layer packaging code, Delphi will be the realization of a concrete display, listing key code and systematic analysis, a comprehensive analysis of object structure, VCL and COM as the source code to the implementation. Informative book, brilliantly expounded, in-depth, major issues include : Delphi compiler for Windows, Delphi RTL code and the user interaction; Delphi R Platform: |
Size: 11641856 |
Author:邢某 |
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Description: 想做一个合格的ic工程师么？这个文档告诉你怎样写高质量的rtl代码。这是SYNOPSYS注册用户才可下载的文档-Want a qualified engineer ic it? This document tell you how to write high quality code rtl. This is the Synopsys registered users can download the document Platform: |
Size: 265216 |
Author:scounix |
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Description: 在 MAX+PLUS II开发环境下采用 VHDL语言 设计并实现了电表抄表器 讨论了系统的四个
组成模块的设计和 VHDL 的实现 每个模块采用 RTL 级描述 整体的生成采用图形输入法 通过波形仿真 下载芯片测试 完成了抄表器的功能-In the MAX+ PLUS II development environment using VHDL language design and implementation of the meter meter reading device to discuss the four components of the system module design and VHDL implementation of each module using RTL-level description of a whole generation of graphical input waveform Simulation download chip testing completed meter reading functions Platform: |
Size: 239616 |
Author:linfeng |
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Description: 典型实例10.8 字符LCD接口的设计与实现
软件开发环境：ISE 7.1i
硬件开发环境：红色飓风II代－Xilinx版
1. 本实例控制开发板上面的LCD的显示；
2. 工程在\project文件夹里面
3. 源文件和管脚分配在\rtl文件夹里面
4. 下载文件在\download文件夹里面,.mcs为PROM模式下载文件,.bit为JTAG调试下载文件。-Typical examples of character LCD interface 10.8 The Design and Implementation of Software Development Environment: ISE 7.1i development environment hardware: Hurricane II on behalf of the red-Xilinx Edition 1. The above examples of the control board of the LCD display 2. Projects \ project folder inside 3. the distribution of the source file and pin in \ rtl folder inside 4. download files in \ download folder inside,. mcs file for the PROM mode download,. bit for the JTAG debugger to download the file. Platform: |
Size: 313344 |
Author:王磊 |
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Description: fft实现的RTL代码，仅仅只能作为参考。多用VERIlog习惯的 很有帮助-fft implementation RTL code, just only as a reference. Multi VERIlog helpful habit Platform: |
Size: 680960 |
Author:张新 |
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Description: this the generation of 48 pulses implementation in hdl language-this is the generation of 48 pulses implementation in hdl language Platform: |
Size: 6144 |
Author:suren |
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Description: 一篇很好的 关于删余卷积编码的RTL实现 文中细致的讲解了删余卷积的FPGA实现 对学习仿真和实现的朋友很有用处-I deleted a good convolutional coding on the RTL implementation of the detailed explanations of the text deleted convolution of the FPGA implementation and realization of simulation for learning is very useful friends Platform: |
Size: 337920 |
Author:linziy |
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Description: DSP Builder是一个系统级（或算法级）设计工具，它架构在多个软件工具之上，并把系统级（或算法仿真建模）和RTL级（硬件实现）两个设计领域的设计工具连接起来，都放在了Matlab/Simulink图形设计平台上，而将QuartusII作为底层设计工具置于后台，最大程度地发挥了这种工具的优势。-DSP Builder is a system-level (or algorithm-level) design tool architecture in a number of software tools on top of, and to system-level (or Algorithm Modeling and Simulation) and RTL-level (hardware implementation) two design design tools to connect together, are placed in the Matlab/Simulink graphical design platform, but will QuartusII as a low-level design tool placed in the background, to maximize this tool edge. Platform: |
Size: 1910784 |
Author:yuan |
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Description: OR1200最小系统，包括软核处理器OR1200，内存，总线，GPIO及UART的RTL实现。在SOPC2000硬件平台上实现。软件开发环境为Ubuntu，能实现SOPC2000和PC机的简单串口通信。-OR1200 minimum system, including soft-core processor OR1200, memory, bus, GPIO and UART of the RTL implementation. In SOPC2000 hardware platform. Software development environment for Ubuntu, PC, to achieve SOPC2000 and simple serial communication. Platform: |
Size: 8090624 |
Author:陶宇 |
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Description: 用verilog实现的电梯控制器，代码中有详细的注释说明，是学习rtl设计很好的资料-The elevator controller using verilog implementation, the code has detailed notes, is good datum to learn rtl design Platform: |
Size: 11264 |
Author: |
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Description: In the semiconductor and electronic design industry, Verilog is a hardware description language (HDL) used to model electronic systems. Verilog HDL, not to be confused with VHDL (a competing language), is most commonly used in the design, verification, and implementation of digital logic chips at the register transfer level (RTL) of abstraction. It is also used in the verification of analog and mixed-signal circuits. Platform: |
Size: 28672 |
Author:nataraja |
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Description: clock and reset guideline for the implementation at RTL level with diagram illustration. Platform: |
Size: 22528 |
Author:Thomas Ang |
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Description: 本文件作为参考的Pascal语言特点的Free Pascal编译器实现的。它描述了所有帕斯卡构建的Free Pascal支持，并列出了所有支持的数据类型。但是，这不，给Pascal语言的一个详细的解释：它不是一本教程。我们的目标是，列出哪些帕斯卡结构的支持，并显示免费的Pascal实现的Turbo Pascal和Delphi中实现不同的。
Turbo Pascal和Delphi的Pascal编译器介绍Pascal语言中的各种功能。 Free Pascal编译器模拟这些编译器的编译器在适当的模式，才能使用某些功能的编译器切换到适当的模式。当需要一定的功能，使用-M命令行开关或{$ MODE}指令将显示在文本中。的各种模式的更多信息，可以发现在用户手册和程序员手册。
本文档的早期版本也包含在系统单元和objpas，单位的参考文档。这已被移动到RTL参考指南。-This document serves as the reference for the Pascal langauge as implemented by the Free Pascal compiler. It describes all Pascal constructs supported by Free Pascal, and lists all supported data types. It does not, however, give a detailed explanation of the Pascal language: it is not a tutorial. The aim is to list which Pascal constructs are supported, and to show where the Free Pascal implementation differs from the Turbo Pascal or Delphi implementations.
The Turbo Pascal and Delphi Pascal compilers introduced various features in the Pascal language. The Free Pascal compiler emulates these compilers in the appropriate mode of the compiler: certain features are available only if the compiler is switched to the appropriate mode. When required for a certain feature, the use of the-M command-line switch or {$MODE } directive will be indicated in the text. More information about the various modes can be found in the user’s manual and the programmer’s manual.
Earlier versions of t Platform: |
Size: 616448 |
Author:sam |
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Description: 实现sha1（128）杂散算法。输入为64bit，输出160bit。(Implementation of SHA1 (128) algorithm. The input is 64bit, and the output is 160bit.) Platform: |
Size: 1024 |
Author:shuli198349
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